Design Verification Intern
ARCHIVED
We can't find an active application page for this role right now. It may reopen or be listed elsewhere. Use Next Steps to search for an active apply link and similar live jobs.
The OpportunityJoin the Core Switching Group (CSG) at Broadcom, the team responsible for developing the world’s most advanced network switching silicon. As a Design Verification Intern, you will be embedded in a high-performance engineering team tasked with ensuring the flawless execution of state-of-the-art MAC, PCS, and SerDes blocks. You will play a critical role in the pre-silicon verification of complex, high-speed networking subsystems that power the next generation of global data centers and AI infrastructure.What You’ll DoYou will be directly responsible for stressing and validating complex digital logic before it goes to silicon. Your core responsibilities will include:Testbench Architecture: Develop, maintain, and enhance highly scalable, object-oriented testbenches using SystemVerilog and UVM.Test Execution & Debug: Create and execute comprehensive test plans, utilizing constrained-random testing to hunt down deep corner-case bugs in complex RTL designs.Coverage Closure: Implement SystemVerilog Assertions (SVA) and functional coverage models to track verification progress and ensure 100% design specification compliance.Flow Automation: Develop and optimize scripting (Python, Perl, or Bash) to streamline verification flows, regression testing, and triage.Required Skills & QualificationsEducation: Currently enrolled in a BS, MS or PhD program in Electrical Engineering or Computer Engineering,.Verification Fundamentals: Demonstrated proficiency with SystemVerilog and the Universal Verification Methodology (UVM).Debugging Expertise: Strong analytical skills with the ability to read and understand complex RTL to effectively debug failures alongside the design team.Scripting: Proficiency in languages like Python or Perl.Preferred QualificationsDomain Knowledge: Prior exposure to networking protocols (e.g., Ethernet, PCIe).Subsystem Experience: Familiarity with the functional verification of physical layer sub-systems, specifically MAC (Media Access Control) or PCS (Physical Coding Sublayer).High-Speed I/O: Basic understanding of high-speed SerDes architectures.EDA Tools: Hands-on experience with industry-standard simulation and debugging tools (e.g., Synopsys VCS, Verdi).Why Broadcom?Broadcom's Core Switching Group solves some of the most rigorous engineering challenges in the semiconductor industry. You will be mentored by elite verification engineers, utilize cutting-edge compute infrastructure, and directly contribute to the quality of silicon that drives the majority of the world's internet traffic.Location: San Jose, CA Duration: 6 MonthsStart Date: Summer 2026Please note that the position is only open to US citizens.