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Sr. Principal Analog IC Design Engineer - CMOS, SerDes, PLL, ADC, TX, TX. Experience with analog design and verification tools (Virtuoso, Spectre, ADE and post layout extraction tools) is a must.
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Architect and Create verification environments using System-Verilog and Universal verification methodology-UVM IPs and SoCs with embedded CPUs and analog mixed-signal interfaces. Capgemini Engineering has more than 55,000 engineer and scientist team members in over 30 countries across sectors including Aeronautics, Space, Defense, Naval, Automotive, Rail, Infrastructure & Transportation, Energy, Utilities & Chemicals, Life Sciences, Communications, Semiconductor & Electronics, Industrial & Consumer, Software & Internet.
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Familiarity with mixed-signal mode verification methodology (SystemVerilog, AMS, Nanotime). As Sr. RFIC Design Engineer within the Wireless Radio team, you will be at the center of a wireless SoC design group with a critical impact on getting Apple’s state-of-the-art wireless connectivity solutions into hundreds of millions of products.
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The Sr. FPGA Engineer will innovate, develop, and support surgical robotic devices and accessories for the da Vinci Surgical System, from concept to launch and beyond. In-depth knowledge of FPGA architecture, design, timing analysis, verification, and debug.
$285,600 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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AMS chip level verification and behavioral modeling of analog and mixed signal circuits. Contribute to the implementation (design, simulation-based verification, and chip integration) and validation of new and derivative ICs using the Advanced Silicon Germanium process.
$200,000 a yearFull-timeExpandApply NowActive JobUpdated 1 month ago - UpvoteDownvoteShare Job
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Work closely with chip architecture, design verification, physical design, DFT, and power teams to achieve tapeout success on designs – generally bridging the RTL and place and route. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation.
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Job DescriptionSenior E/E & Semiconductor Engineer - Mixed Signal Verification Engineer-DescriptionPosition- Mixed Signal DV Engineer Location-Sunnyvale CA - Onsite roleJob description:We are seeking Mixed signal Design Verification Engineer who is proficient in system verilog real number modeling and experience with UVM. Proficient in debug skills and experienced with gate level parasitic annotated simulations.
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Ability to perform physical verification checks such as DRC, LVS, ERC, etc. Guard the Integrity – Be the final gatekeeper, conducting rigorous physical verification to ensure flawless functionality before the grand tape-out.
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Innova Solutions is immediately hiring a Design verification Engineer. Design Verification Engineering Services. Testbench development – System Verilog Universal Methodology (“UVM”), Python, and C tests.
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This is a role for a versatile engineer that includes RTL design, verification, Emulation/FPGA partitioning and implementation, and lab based bringup of the SoC/GPU chips. + Extensive design verification experience (RTL, Emulation, or Prototyping.
$356,500 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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As a member of the mixed signal team, the candidate's work encompassing the development of the state of the art mixed signal IP for SOC including SerDes, PLL, DDR PHY, MIPI PHY, candidate will have exposure to a broad range of IP design phases, including analog circuit level transistor design, IP top level mixed-mode modeling, digital system RTL design, verification, synthesis, STA analysis, simulation and verification in mixed-signal IC environment.
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As a Design Verification Engineer at Lightmatter, you will find yourself at the heart of a dynamic, interdisciplinary team. Sr. Design Verification Engineer. This role offers a unique platform to enhance your skills across a spectrum of areas including UVM, AMS modeling, mixed-signal verification, formal verification, emulation, and both performance modeling and verification.
$170,000 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Languages, digital image processing and chip-level tape out procedure from initial PRD, design, verification, timing closure, FPGA emulation and ECO. languages, digital image processing and chip-level tape out procedure from initial PRD, design, verification, timing closure, FPGA emulation and ECO.
$200,000 a yearFull-timeExpandApply NowActive JobUpdated 8 days ago - UpvoteDownvoteShare Job
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As RFIC Design Engineer within the Wireless Radio team, you will be at the center of a wireless SoC design group, contributing to Apple's state-of-the-art wireless connectivity solutions into hundreds of millions of products.
$256,500 a yearExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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We are seeking a highly experienced DevOps CI/CD Verification Engineer to drive hardware/software verification, emulation automation, SOC (System on Chip) automation. Translate loosely defined testing requirements into actionable and effective solutions, ensuring all functional goals are met through rigorous pre- and post-silicon verification.
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verification engineer jobs in Mountain View, CA
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