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DSP Algorithms Engineer

VibotekAustin, TXApril 23rd, 2026
Senior DSP Algorithms Engineer - Coherent Optical SystemsLocation: Austin, TX (Onsite - 5 days/week)Role SummarySenior individual contributor responsible for system-level verification and stress testing of coherent optical DSP algorithms prior to silicon tape-out. The focus is on breaking the design early by exposing algorithmic and system-level weaknesses under realistic and worst-case optical conditions.Key ResponsibilitiesPerform end-to-end system-level DSP verification (Tx → Fiber → Rx) for coherent optical systems. Design aggressive stress tests, corner cases, and adversarial scenarios to uncover latent issues pre-tape-out. Build and refine optical channel and impairment models (dispersion, non-linearities, noise, laser effects). Apply deep DSP algorithm knowledge to intentionally attack weak points. Partner with DSP designers to define performance metrics, analyze failures, and drive root-cause fixes. Develop and automate verification frameworks using MATLAB, Python, C/C++, or similar tools. Own verification strategy independently in a distributed team environment. Must-Have Skills & Experience Deep expertise in coherent optical communications DSP with hands-on industry experience. Strong background in DSP algorithm development and system-level (pre-silicon) verification. Solid understanding of:Optical fiber channel behavior & physical impairments Coherent receiver architectures & signal processing chains Extensive experience with DSP modeling/simulation (MATLAB, Python, C/C++, SystemC). Ability to independently define and execute complex verification strategies. EE or related degree (BS/MS/PhD); experience matters more than degree. Commercial/industrial experience (not purely academic). Nice to HaveRTL or hardware implementation awareness AFE behavior and DSP interaction Fixed-point modeling, ASIC/DSP constraints FEC (LDPC, RS, OFEC), mixed-signal effects (jitter, PLL/CDR) Other DetailsWork Authorization: H1-B sponsorship available / USC / GC Interview Process: 3 rounds (approx. 2 weeks) Compensation: Competitive base + equity Relocation: Case-by-case