Security Operations Center Architect

RTL Design / Digital (Logic) Design EngineerLocations: Bay Area, Austin, DallasThe role is related to High Bandwidth Memory (HBM). The program involves building a custom chip around the HBM piece by working with memory vendors. This highly strategic program requires leveraging external vendors extensively, and initially, they plan to work with one of the three big HBM vendors—Samsung, Hynix, and Micron—but will eventually need to work with all of them in parallel due to high demandDetails of expertise:Project experience with ARM based ecosystem componentsM7, Coresight, NIC, and other AMBA bus interconnectFamiliarity with AMBA bus protocols and SoC system debug infrastructureStrong experience with micro-architecture, Verilog/ System Verilog, Synthesis, timing constraints development, Lint, CDC checksUnderstanding of SoC interfaces like QSPI, UART, and GPIOsCapable of working with multiple IP vendors and other IP teamsStrong experience with UVM based verification, setting up co-simulation environments with ARM CPU modelsPlus points: experience with DRAM memory controllers and its interfacesPlus points: experience with UCIe