Senior Debug, Trace & Profiling Hardware Engineer
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SiFive, Inc. in Santa Clara, California is seeking a Hardware Design Engineer responsible for designing and enhancing debug, trace, and profiling IP for RISC-V processors. This role involves collaborating with various engineering teams to ensure high-quality integration and documentation.
The ideal candidate has 7+ years of relevant experience, a MS/PhD in a technical discipline, and proficiency in RTL design languages. A competitive benefits package is offered, along with a pay range of $158,760.00 – $194,040.00.
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