Mixed Signal IC Layout Engineer

A company is looking for a Mixed Signal IC Layout Design Engineer - Contractor. Key Responsibilities Collaborate with circuit designers to create full custom analog/mixed signal layouts for various blocks and optimize floorplans and routing Apply layout best practices to meet stringent specifications for matching, noise, and accuracy, while optimizing for parasitic effects Run and debug physical verification checks and support post-layout extraction and simulation with circuit designers Required Qualifications 5 years of experience in analog/mixed signal IC layout engineering with a focus on CMOS/FinFET nodes Proficiency in Cadence Virtuoso or equivalent custom layout environments Strong understanding of CMOS devices and advanced node rules Experience with physical verification flows for DRC, LVS, and other checks Familiarity with scripting languages such as Python, Tcl, or SKILL for automation is a plus