Design Verification Engineer, DRAM
Role:
As a Design Verification Engineer, you will verify and optimize digital and analog circuit designs for next-generation memory technologies. Your responsibilities include verifying circuit functionality, reliability, power, and compliance with specifications, as well as driving verification planning, coverage closure, debugging, and design improvements. You will perform circuit modeling and simulation using industry-standard tools, support silicon validation, reticle experiments, and tape-out activities, and collaborate with engineering, manufacturing, and product teams to ensure manufacturability. Qualifications And Skills Bachelor’s degree in Electrical Engineering or related field 4+ years in semiconductor design, verification, or development Experience with verification planning, coverage strategies, debug, and silicon correlation Proficiency with IC modeling and simulation using SPICE and Verilog Knowledge of digital and analog circuit design methodologies and tools such as Synopsys and Cadence Virtuoso
Preferred Qualifications:
- Master’s degree in Electrical Engineering or related field
- Experience with UVM, mixed-signal verification, advanced DRAM architectures, DDR5+ methodology, and memory technologies
- Knowledge of AI-assisted design verification, parasitic modeling, and high-voltage reliability 5+ years in verification, modeling, or mixed-signal design, with programming skills in Python