Engineer, Staff

Job Description: The Digital ASIC Design Team is currently seeking candidates who will be responsible for the implementation and verification of DFT/DFD (Design for Test/Design for Debug) techniques for low power, multi voltage designs. The candidate should have solid hands-on experience with industry standard DFT techniques such as scan and MBIST. Job responsibilities include DFT pattern generation, coverage analysis and debug as well as running and debugging gate level simulations. The ideal candidate will have experience in both pre, and post-silicon in the DFT domainJob function/Responsibility:The person hired in to this role will be contributing to DFT insertion and validation effort of complex chip, core and/or blocks.Analyze, propose best compression that can be achieved for given SoC/core/blockOwn and deliver scan insertion, validate equivalence checkDebug/resolve any DRC issues, identify solution and work with front-end team to ensure DFT DRCs are fixed.Analyzing and meeting ATPG coverage goalsOwns STA constraints and work with STA team to resolve timing violationsowns IDDQ constraints generation and validationWorking independently in the team to solve problems, enable his team to deliver on time with high qualityResponsible for deliverables of certain aspects of SoC DFT executionResponsible for pattern verification and debugSkills/Experience:Minimum of 5-6 year experience in the area of ASIC/DFTIn depth knowledge of DFT conceptsIn depth knowledge and hands on experience in scan insertion, ATPG, coverage analysis, Transition delay test coverage analysisExpertise in test mode timing constraints definition, knowledge in providing timing fixes/corrective actions for timing violationsExpertise in scripting languages such as perl, shell, etc.Experience in simulating test vectorsKnowledge of equivalence check, DFT DRC rules both in RTL lint tool (like spyglass) and ATPG tool like (TK, TetraMax)Working experience in Synopsis TetraMax/DFTMax and Cadence Encounter Test is a plusAbility to work in an international team, dynamic environmentAbility to learn and adapt to new tools and methodologies.Ability to do multi-tasking & work on several high priority designs in parallel.Excellent problem solving skillsExcellent communication and team work skills and good English is requiredMinimum QualificationsEducation:Bachelors/Masters - EngineeringWork Experiences:6+ years Hardware Engineering experience or related work experience.Comments for Suppliers: DFT Engineer