Field-Programmable Gate Arrays Engineer
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FPGA Engineer – HAPS & ZeBu PrototypingKey Requirements:Strong experience in FPGA prototyping platforms like Synopsys HAPS and Synopsys ZeBuHands-on with RTL design/verification (Verilog/SystemVerilog)Experience in FPGA bring-up, debugging, and validationKnowledge of partitioning large SoC designs across multiple FPGAsFamiliarity with clocking, reset strategies, and timing closureExperience with high-speed interfaces (PCIe, Ethernet, DDR, AXI)Strong debugging skills using logic analyzers, waveform tools, and emulation debug flowsNice to Have:Experience with UVM-based verificationExposure to SoC architecture and CPU subsystemsScripting in Python/TCLResponsibilities:Develop and maintain FPGA prototypes using HAPS/ZeBuPerform design partitioning, synthesis, and timing optimizationDebug issues across RTL, FPGA, and emulation environmentsCollaborate with design and validation teams for pre-silicon verificationEnable software bring-up on emulation/prototyping platforms