Staff DFT RTL Architect - AI Hardware SoCs

Tesla Motors, Inc. is looking for an ASIC RTL Design Engineer in Palo Alto, CA, specializing in designing high-performance RTL for AI accelerators. The role entails defining DFT architecture for complex SoC designs and requires over 10 years of experience in DFT and RTL insertion. Candidates should possess expert knowledge of Siemens Tessent and IEEE standards. Competitive compensation, including $128,000 to $312,000 annually plus cash and stock awards, is offered along with comprehensive benefits. J-18808-Ljbffr