<Back to Search
RFIC Design Engineer
Sunnyvale, CAApril 5th, 2026
**Role Number:** 200623902-3956**Summary**Do you have a passion for invention and self-challenge. Do you thrive with pushing the limits of what's considered feasible? As part of an outstanding team, you'll craft sophisticated, groundbreaking projects that deliver more performance in our products than ever before. You'll work across fields to transform improved hardware elements into a coordinated design. Join us, and you'll help us innovate new technologies that continually outperform the previous iterations! By collaborating with other product development groups across Apple, you'll push the industry boundaries of what wireless systems can do and improve the product experience for our customers worldwide.**Description**The wireless RFIC team architects, designs, and validates radio transceivers integrated into sophisticated wireless SoCs. Our wireless organization is responsible for all aspects of wireless silicon development that transform the user experience at the product level, all of which is driven by an outstanding vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation and FW/SW engineering! As an engineer within the Wireless Radio team, you will be at the center of a wireless SoC design group, chipping in to Apple's innovative wireless connectivity solutions into hundreds of millions of products.**Minimum Qualifications**+ BS and 10+ years of relevant industry experience.+ Shown RF/analog and mixed-signal design experience in groundbreaking RF CMOS design.+ Strong understanding of analog design concepts such as analysis of noise, linearity, mismatch, stability, and other analog impairments.+ Experience in Cadence Virtuoso, Spectre RF, Matlab, EM simulation (EMX, HFSS), and similar tools.+ Direct experience in designing and bringing wireless transceivers into mass production in deep sub-micron RFCMOS technology.+ Experience should also include understanding DFT and DFM techniques for mass production environments.**Preferred Qualifications**+ MSEE and PhD plus relevant industry experience.+ Solid Understanding of the impact of modulation type on radio architecture and requirements.+ Validated capability to work with digital design group for an optimum partition between digital and analog domains.+ Familiarity with the integration flows and challenges of wireless SoC's.+ Good understanding of desense and can work with board RF/HW/Antenna teams to optimize board/module layouts for desense mitigation.+ Familiarity with mixed-signal mode verification methodology (SystemVerilog, AMS, Nanotime).+ Extensive experience in Silicon characterization and debugging.+ Ability to drive strong production test/QA methodologies.Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088\_EEOC\_KnowYourRights6.12ScreenRdr.pdf) .
648 matching similar jobs near Sunnyvale, CA
- Staff Field Service Engineer - 1st Shift
- Test Manager | Photonics
- Senior SoC Power Analysis Engineer
- 2.5D/3D Process Development Engineer
- Staff Engineer 3, SSRL RF Systems
- CPU Micro Architect / Logic Designer
- ATE Test Development Engineer
- Optical Engineer, Senior Staff
- Design Verification Engineer, (L3/L4/L5/)
- Customer Engineer
- Board Level Test Engineer - Day Shift
- Junior Validation Engineer
- CPU Design Verification Engineer
- Sr. Process Integration Engineer
- New Product Introduction/Electrical design Engineer
- Optical Design Engineer - Biophotonics
- Senior Principal MMIC Design Engineer
- Sr. HSIO Validation Engineer, Annapurna Labs Machine Learning Acceleration
- Process Engineer III Senior
- Hardware (HW) Qualification and Development Support Team (DST) Engineer III
- Process Engineer III Senior - (E3 Senior)
- Process Engineer III - (E3)
- CPU Integration CAD Engineer
- VLSI Design Engineer for Server / Data Center Products
- Physical Design Methodology CAD Engineer
- Digital Layout Design Engineer
- Photonics/ AR Process Integration Engineer
- ASIC/SOC Silicon Physical Design Engineer
- Senior Formal Verification Engineer
- CPU Formal Verification Engineer
- Process Engineer E3
- ASIC Design Verification Engineer (Security Group)
- Technical Intern, High-Speed I/O (HSIO) Validation
- SoC Physical Design Verification Engineer
- Senior Principal Engineer, Physical Design
- Principal Test Engineer
- Senior Staff System & Modeling Engineer - Wireline Communications
- GPU Physical Design Engineer Lead
- Board Level Test Engineer
- Analog Layout Engineer