RTL Integration Engineer | SoC Debug & CDC Expert
Broadcom Inc. in California seeks a senior RTL/SoC verification engineer to perform IP integration, test and debug at the SoC level, and create RTL designs with linting.
The role includes:
CDC/RDC analysis for RTL and gate-level designs, plus synthesis, palladium modeling and STA support. Candidates should have expertise in UVM and SystemVerilog, GLS, zero-delay and SDF simulations, and strong debugging and communication skills. A Bachelor's degree with 12+ years experience is required.