PCB & Substrate Layout Engineer

Title: Principal PCB & Substrate Layout Engineer (Cadence APD+)Location: Phoenix, AZ (Onsite Preferred / Hybrid / Remote Considered)Employment Type: Contract (6+ Months)Status: Accepting CandidatesAbout the RoleWe are seeking a Principal PCB & Substrate Layout Engineer with deep expertise in advanced substrate development and Cadence APD+.This position will focus on the design and development of complex high-density substrates, advanced packaging technologies, FPGA packaging solutions, and next-generation electronic assemblies supporting aerospace and defense applications.The ideal candidate possesses extensive experience with Cadence APD+, substrate design rules, HDI technologies, and advanced packaging methodologies.Key ResponsibilitiesSubstrate Development & LayoutDevelop advanced substrate layouts utilizing Cadence APD+Design high-density interconnect (HDI) substratesCreate complex package layouts supporting advanced electronic systemsSupport advanced packaging initiatives including 2.5D and stacked package technologiesAdvanced Packaging DesignDesign and develop:InterposersSubstratesFlip-Chip PackagesDie StackingPackage StackingSubstrate StackingSupport high-performance package architecturesImplement advanced packaging methodologies for complex productsConstraint Management & Design RulesUtilize Cadence APD+ Physical Constraint EditorUtilize Cadence APD+ Electrical Constraint EditorDevelop and maintain substrate design rulesEnsure compliance with manufacturing and assembly requirementsHDI & High-Speed DesignDesign HDI stack-ups incorporating:Blind ViasBuried ViasMicroviasSupport fine-line routing requirementsOptimize layouts for:Signal IntegrityPower IntegrityManufacturabilityManufacturing SupportGenerate fabrication and assembly documentationValidate manufacturing data using CAM toolsCollaborate with fabrication vendors and manufacturing teamsSupport design reviews and technical assessmentsCross-Functional CollaborationPartner with:Electrical EngineeringMechanical EngineeringManufacturing EngineeringSupport 3D package modeling and fit-check activitiesParticipate in thermal and mechanical design reviewsQualificationsBachelor's Degree in Engineering or equivalent experience10+ years of PCB and/or Substrate Layout experienceExpert-level experience with:Cadence APD+Advanced Package DesignerExtensive experience with:Substrate DevelopmentSubstrate Design RulesHDI TechnologiesExperience with:FPGA Package DesignPackage LayoutHigh-Speed DesignsStrong understanding of:Digital LayoutAnalog LayoutRF Layout TechniquesPreferred Qualifications2.5D PackagingInterposer DesignFlip-Chip PackagingDie StackingPackage StackingSubstrate StackingCAM350BluePrintRF PackagingThermal Modeling CollaborationAerospace & Defense ExperienceIndustry StandardsExperience with:IPC StandardsEDEC StandardsFabrication SpecificationsAssembly SpecificationsElectronic Packaging StandardsCompensation$85-$90/hr W26+ Month ContractLocation: Phoenix, AZ