FPGA DSP/RTL & Verification Engineer

Job Title: FPGA DSP/RTL & Verification EngineerLocation: Mountain View, CA Duration: Long Term ContractRole OverviewWe are seeking an experienced FPGA DSP/RTL & Verification Engineer with 8+ years of expertise in FPGA design, verification, and digital signal processing for wireless communication systems. The ideal candidate will have strong hands-on experience with Xilinx FPGA platforms, DSP algorithm development, and RTL design, along with proficiency in verification methodologies.Key Responsibilities & Requirements8+ years of experience in FPGA design and verification for DSP and wireless communication algorithms.Strong background in developing and optimizing DSP algorithms, including MIMO DSP functions, for real-time applications.Proficiency in writing synthesizable Verilog/SystemVerilog RTL modules for DSP functions.Hands-on experience programming FPGAs using available IPs to implement real-time DSP functions.Expertise in integrating IP blocks into Vivado block designs on Xilinx UltraScale+ MPSoC with AXI interconnect.Solid knowledge of Xilinx Vivado for design, synthesis, and verification workflows.Ability to develop and execute unit-level testbenches in SystemVerilog and/or cocotb, with bit-accurate comparison against C++ and Python reference models.Familiarity with phased array and/or beamforming applications is a strong advantage.Strong collaboration skills to work with cross-functional teams for efficient design, verification, and deployment of DSP modules.