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Sr. Engineer, Link Architecture
San Jose, CAMarch 23rd, 2026
Sr. Engineer, Link ArchitectureLocation: San Jose, CA (on-site)Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light instead of electricity to move data faster, further, and with a fraction of the energy needed to fuel the explosive growth of AI models.Backed by industry giants like NVIDIA, AMD, and Intel, Ayar Labs' co-packaged optics solution is key to unleashing next-generation AI scale-up architectures.We are seeking a highly motivated Link Architecture Engineer to join our Link Design team and play a pivotal role in shaping our silicon photonics optical I/O platform. In this role, you contribute to the end-to-end architectural vision by developing advanced models and designs that unify electrical circuits and photonic devices. By capturing the complex interplay of signal processing and physical behavior, you will optimize the performance of Ayar Labs' CPO solution and define the specifications for our next-generation product roadmaps.Essential FunctionsDevelop high-fidelity Python and Verilog-A models for photonic and electrical blocks to capture end-to-end signal processing and physical behavior.Evaluate future product solution spaces and define precise component-level specifications through rigorous link modeling studies.Identify key device performance metrics and translate hardware variability into its impact on total link budget and manufacturing yield.Partner with Photonic and AMS teams to refine optical I/O architectures, ensuring seamless integration across electrical and optical domains.Critically evaluate internal and external test data to calibrate models and drive meaningful design improvements.Required QualificationsPhD in Optics/Photonics, Physics, or Electrical Engineering or a Master's degree with 2+ years of industry experience and a strong background in electrical engineering and optical signal processingKnowledge of photonics, electrical engineering, or high-speed link design.Comprehensive understanding of high-speed electrical and/or optical links, including signal integrity and transceiver principles.Strong proficiency in Python for scientific computing and data analysis.Prior experience in the design and simulation of PIC components or large-scale integrated optical systems.Excellent communication skills to convey complex technical concepts and a proven ability to thrive in collaborative team environments.Preferred QualificationsIn-depth knowledge of silicon photonic devices, and optical test/measurement methodologies.Deep background in signal processing principles and optical test/measurement methodologies.Proficiency in behavioral modeling using Verilog-A and knowledge of mixed-signal simulation methodologies.Salary range: $165,000 - $220,000NOTE TO RECRUITERS:Principals only. We are not accepting resumes from recruiters for this position. Remuneration for recruiting activities is only applicable subject to a signed and executed agreement between the parties. Please don't send candidates to Ayar Labs, and do not contact our managers.Ayar Labs is an Affirmative Action/Equal Opportunity Employer and is strongly committed to all policies which will afford equal opportunity employment to all qualified persons without regard to age, sex, national origin, race, color, ethnicity, creed, religion, gender identity, sexual orientation, disability, veteran status, or any other characteristic protected by law. It is the policy of Ayar Labs to provide reasonable accommodation when requested by a qualified applicant or employee with a disability, unless such accommodation would cause an undue hardship. Veterans are more than welcome and encouraged to apply.