Senior Radar FPGA/Embedded Systems Engineer

Why LeoLabs?At LeoLabs, we're building the living map of activity in space. Through our proprietary global radar network and AI-enabled analytics platform, we collect millions of measurements daily on more than 25,000 objects in low Earth orbit (LEO). Our radar-powered intelligence protects billions in assets, monitors adversarial behavior, and ensures safe operations for commercial and government missions.We're not just building technology, we are redefining global security, safety, and transparency in space. As orbital activity accelerates and threats grow more complex, LeoLabs is a trusted partner for Space Domain Awareness, Space Traffic Management, and Satellite Operations for top-tier space operators and allied defense organizations.If you're looking to work on mission-critical challenges at the forefront of aerospace, national security, and AI, your impact starts here.We are currently looking for a Senior Radar FPGA/Embedded Systems Engineer to support our growing team. Our Radar Systems group develops, maintains, and operates advanced software for phased array radars. This role would be responsible for building, maintaining, and deploying the FPGA images we use in our in house SDRs as well as the control software to interact with the radar and drivers.Why This Role Matters:Your work directly impacts mission-critical radar systems that support national security, commercial space operations, and global space safety by enabling precise detection, tracking, and analysis of objects in space.Daily work focuses on software development in the following key areas:Xilinx Platform OwnershipOwn and maintain the Xilinx Vivado + Yocto project(s) end-to-endModernize and harden the development and production environmentsUpdate the existing projects to build and run on current Xilinx tool versionsEstablish a reliable process to build, package, and deploy FPGA/boot images to devices (local and remote)RF Signal Processing-Focused FPGA DevelopmentModify and improve FPGA-based RF/radar signal processing chainsWork with RF/signal-processing stakeholders to translate performance needs into FPGA changesManage fixed-point design tradeoffs and validate against system-level metricsTesting, Verification & ReliabilitySignificantly improve the FPGA verification and regression infrastructureAdd observability and diagnostics for on-target debug (ILA/VIO, counters, assertions/health monitors) and define acceptance tests for new releasesEmbedded Software Integration (C / Rust)Be comfortable reading and writing C and Rust for embedded targets to support FPGA integrationDefine and maintain clean FPGA software contracts to support long-term maintainabilityMinimum QualificationsU.S. Citizenship or permanent residentExcellent communications skills, must be able to communicate highly technical ideas in a manner that is comprehensible to a team composed of individuals from diverse disciplinesBachelor's degree in EE/CE (or related) plus 8+ years of relevant FPGA experience (or equivalent advanced degree + fewer years).Strong, demonstrated experience owning production Xilinx FPGA projects (Vivado, constraints, IP integration), plus embedded Linux exposure (PetaLinux strongly preferred).Practical experience with coherent timing systems (10 MHz / 1PPS) and debugging timing-sensitive field issues.Preferred / Huge PlusDirect experience with Xilinx RFSoC devices (architecture, data converters, clocking, tool flow, common pitfalls)Experience operating and updating Yocto/AMD EDF-based systems in the field, including remote update/deployment workflowsPerks and BenefitsGlobal workforce: flexible remote/hybrid opportunitiesWork on complex, meaningful missions with real-world impactUnlimited paid time off for most rolesCompetitive salary and equity packagesComprehensive health, dental, and vision coverageAccess to the forefront of commercial space operations and defense innovationAll qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identify, national origin, disability, or status as a protected veteran.