RTL Design Engineer
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RTL Design EngineerLocation - Mountain View, CADuration: Full Time/ ContractDay 1 onsiteDescription:Responsibilities RTL, Arithmetic CPU, ALU, Design Processer, and resolving system level challenges.Candidate must have excellent Verilog and System Verilog concepts.Experience in verification of complex RTL designs and validating them on the boards is an added advantage.Working knowledge of UNIX environment and scripting languages (PERL, Python/TCL etc) desired.Excellent communication and problem solving skills.