<Back to Search
Static Timing Analysis (STA) Engineer - (Lead or Senior)
Los Angeles, CAMarch 30th, 2026
Job DescriptionAt Boeing, we innovate and collaborate to make the world a better place. We're committed to fostering an environment for every teammate that's welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us.Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for a Static Timing Analysis (STA) Engineer to join us as part of our Boeing Electronic Products team located in El Segundo, CA and at the heart of Boeing's products - ASICs and FPGAs.Our Electronics Products team goal is to be Boeing's sole source for electronics. We've grown by over 400% and continue to have new opportunities to support more Boeing Platforms. We are seeking an experienced Static Timing Analysis Engineer that is ambitious and will thrive in a technology development environment and can work the full spectrum from research through flight insertion. We're highly supportive of innovative thinking, we respect and acknowledge hard work, we recognize maturity and integrity, and we reward bottom-line achievement. At Boeing, we value your curiosity, your determination, and your imagination. #TheFutureIsBuiltHereThe work we do enables the missions and needs of our customers as we help Connect, Protect, Explore, and Inspire the world. Our team of engineers leverage leading-edge technology and work with world-class partners to provide some of the most complex SoCs in the world. We develop robust, high-performance custom processors using the latest ARM IP to enable high-integrity, low SWAP-C flight computers. Plus, we're applying the latest digital IC design processes with industry-best tools to enable applications that cut across every domain at Boeing.Our diverse development portfolio provides opportunities to learn with exposure to the breadth of the Boeing product line - approximately half our design work is within the Space & Launch business unit, and half is from other parts of Boeing (AvionX; Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems).As a Static Timing Analysis (STA) Engineer you will handle pre-layout and post-layout timing for state-of-the-art digital ICs/SoCs & FPGAs on the most critical programs across the Boeing Defense and Security enterprise. You will collaborate with other electronics groups across the company and around the world from the early design stages until signoff to help achieve first pass success. You will be working with a large physical design team within the company and outside of the company for timing convergence. Boeing STA engineers are required work with IP team, EDA vendors, and Foundry for the design closure.Position Responsibilities* Responsible for STA analysis and convergence throughout the ASIC cycle* Responsible for finding solution for intricate timing paths (Digital, analog and mixed signal)* Facilitate STA methodology in collaboration with other STA leaders* Generate timing constraints for multiple ASICs and FPGAs* Generate tool independent timing constraints that will work for synthesis, place & route and static timing analysis* Responsible for intricate cross domain timing path closure* Extract timing information from circuit analysis and develop primary input setup/hold timing constraints as well as primary output required arrival time (RAT) and skew timing constraints* Programming skills with Python, TCL, Perl, Unix shell etc.* Help train new engineersThis position is expected to be 100% onsite. The selected candidate will be required to work onsite in El Segundo, CA.Our worksite participates in Boeing's optional 9/80 schedule rotation. 9/80 is a rotation in which employees can work 9-hour shifts, 8 days per pay period (bi-weekly) and receive every other Friday off.Travel may be required up to 10% of the time; Domestically and/or internationally depending on business needs.This position requires the ability to obtain a U.S. Security Clearance for which the U.S. Government requires U.S. Citizenship. An interim and/or final U.S. Secret, Top Secret, or Top-Secret SCI Clearance Post-Start is required.Basic Qualifications (Required Skills/Experience)* Bachelor of Science degree in Engineering (with a focus in Electrical, Mechanical or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry or non-US equivalent qualifications directly related to the work statement* 5 years of experience with timing closure on ASICs and FPGAs* Experience with several ASICs/FPGAs signoff and at least one ASIC tape-out. Good understanding of RTL to GDS flow* Proficiency using Synopsys Primetime (or Cadence Tempus) for timing analysis and Synopsys Design Compiler (or Cadence Genus) for synthesis* Ability to work with large physical design team to make the timing convergence successfulPreferred Qualifications (Desired Skills/Experience)::* Lead, Level 5: 15+ years of related work experience or an equivalent combination of education and experience* 10 or more years of experience with timing closure on ASICs and FPGAs* Completed multiple first-pass success ASIC tape-outs with intricacies (Cross clock domain, async crossing etc.)* Experience in using multiple static timing tools (Cadence Tempus, Vivado, Synopsys Primetime)* Fair knowledge of Synopsys Fusion Compiler, Formality (Cadence LEC), and other relevant tools (e.g. TCM, Fishtail)* Synopsys physical design AI tool experience is a plus* Experience leading static timing closure and training new hires* Familiarity with space-based design techniques and radiation mitigation* Understanding of design for testability (DFT) and its implications on timing* Capable of working independently, self starter* Proficiency with multiple scripting languages (Python, C SHELL, TCL)* Capable of handling timing closure on multiple designs simultaneouslyTypical Education/ExperienceLead, Level 4: Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, engineering technology (includes manufacturing engineering technology), computer science, engineering data science, mathematics, physics or chemistry (e.g. Bachelor) and typically 9 or more years' related work experience or an equivalent combination of technical education and experience or non-US equivalent qualifications. In the USA, ABET accreditation is the preferred, although not required, accreditation standard.Senior, Level 5: Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, engineering technology (includes manufacturing engineering technology), computer science, engineering data science, mathematics, physics or chemistry (e.g. Bachelor) and typically 14 or more years' related work experience or an equivalent combination of technical education and experience or non-US equivalent qualifications. In the USA, ABET accreditation is the preferred, although not required, accreditation standard.RelocationThis position offers relocation based on candidate eligibility.Drug Free WorkplaceBoeing is a Drug Free Workplace where post offer applicants and employees are subject to testing for marijuana, cocaine, opioids, amphetamines, PCP, and alcohol when criteria is met as outlined in our policies.Shift WorkThis position is for 1st shift.At Boeing, we strive to deliver a Total Rewards package that will attract, engage and retain the top talent. Elements of the Total Rewards package include competitive base pay and variable compensation opportunities.The Boeing Company also provides eligible employees with an opportunity to enroll in a variety of benefit programs, generally including health insurance, flexible spending accounts, health savings accounts, retirement savings plans, life and disability insurance programs, and a number of programs that provide for both paid and unpaid time away from work.The specific programs and options available to any given employee may vary depending on eligibility factors such as geographic location, date of hire, and the applicability of collective bargaining agreements.Pay is based upon candidate experience and qualifications, as well as market and business considerations.Summary pay range for Lead (Level 4): $146,200 - $197,800Summary pay range for Senior (Level 5): $176,800 - $239,200Applications for this position will be accepted until Apr. 04, 2026EducationBachelor's Degree or Equivalent RequiredRelocationThis position offers relocation based on candidate eligibility.Security ClearanceThis position requires the ability to obtain a U.S. Security Clearance for which the U.S. Government requires U.S. Citizenship. An interim and/or final U.S. Top Secret Clearance Post-Start is required.Visa SponsorshipEmployer will not sponsor applicants for employment visa status.ShiftThis position is for 1st shiftEqual Opportunity Employer:Boeing is an Equal Opportunity Employer. Employment decisions are made without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, physical or mental disability, genetic factors, military/veteran status or other characteristics protected by law.Read more Shows the full job description for sighted usersApply Now Save JobRemove Job
Showing 900 of 11,246 matching similar jobs in Shell Valley, ND
- Litigation Associate - Plaintiff Employment
- Operations Manager for EE Firm - Relocation available
- Electrical Engineer II - Test
- EE/EV Solution Architect
- Senior RF Signals Engineer
- Advantest 93K Test Development Engineer
- Reliability IT Engineer
- Electrical Engineer III - New Glenn Avionics
- HW Engineer
- Spaceflight Hardware Systems Engineer - Space Systems
- CAD/EDA Engineer I, CAD/EDA Engineer II, Senior CAD/EDA Engineer, Texas Institute for Electronics
- Embedded Firmware Engineer — Real-Time Brain Tech (Rust/C/C++)
- Sr Hardware Test and Packaging Engineer
- Senior Electrical Engineer, Power
- Senior Mechanical Systems Engineer, Texas Institute for Electronics
- Rocket Engine Avionics Test Equipment Design Engineer II
- Hardware Co-op
- Manufacturing Engineer - Electrical/Electronics (Associate or Mid-Level)
- Computer & Electrical Engineer, Advanced
- Founding SRE Engineer – Reliability & Growth
- Litigation Associate - Plaintiff Employment
- Senior Embedded AI Engineer: PCB & Firmware
- Microsoft 365 Engineer - SharePoint & Power Platform
- Senior Civil Designer - Land Development Lead in VALeesburg, VAMarch 27th, 2026
- Starlink Hardware Reliability Specialist - 2nd Shift
- Staff Engineer, QA and Verification
- Senior Power Electronics Module Applications Engineer
- Lead Photonics Test Infrastructure Engineer - Automation
- Senior Embedded Test Engineer - Lead Automation & Quality
- DFT - Staff DFT Engineer
- Wireless PHY Verification Engineer: High-Rate DSP & SoC
- Director of Sales - Embedded Electronics Sub Systems
- Lead IP/SOC Verification Engineer
- Lead RF Engineer, Digital (TS/SCI Eligible)
- Radiation Effects Engineer III
- Senior FPGA & Embedded Firmware Architect
- RF Engineers
- RF Engineers
- Software Engineer, Hardware Tools and Methodology - New College Grad 2026
- Firmware Engineer - Embedded Systems for SoCs & Power