Senior Software Engineer - Virtual Hardware Modeling

Opening for Software engineer- Virtual hardware Modeling- Sunnyvale CA- Onsite.Role: Senior Software Engineer - Virtual Hardware Modeling Work location: Sunnyvale CA- OnsiteHigh proficiency in modern C++ in the domains of chip-design, electronic design automation or simulation. • Experience with the SystemC/TLM library • Experience with virtual platform development tools and frameworks, such as Synopsys Virtualizer, Cadence Virtual Platform, Imperas OVP, or ARM Fast Models • Familiarity with processor/DSP architectures, such as ARM, RISC-V, and XTensa • Familiarity with NoC, MMU, address translations, and cache modeling • Familiarity with the standard C++ concurrency support library: threads, atomic operations, memory ordering, etc… • Proficiency in Python to automate design flows, creation of collateral data\"