CAD Engineer - Verification

Responsibilities Develop Lint rules for different phases of the design. Work closely with the verification team to improve simulation and debugging methodologies. Qualifications Previous experience with Formality, VCS, Verdi and Siloti. Previous experience with SpyGlass. Strong technical background in RTL design and/or RTL synthesis. Experience with Verilog/SV coding. Ability to understand and articulate good RTL coding guidelines. Integrate SpyGlass tools into design flows. Deploy SpyGlass across the design team. Support designers in production design work. Work with EDA vendors to support tool evaluations and integration into the design flow. Act as an interface between the EDA vendors and designers to assist in debugging tool issues. TCL/Perl/Make scripting experience. All your information will be kept confidential according to EEO guidelines. #J-18808-Ljbffr