Semiconductor Test Engineer
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Location: Longmont, COLOA: Up to 1 year on the contractThe 93k environments are SmarTest 8&7.Key ResponsibilitiesDevelop, debug, and optimize test programs on Advantest V93000 SoC test systems (SmarTest 8 & 7)Perform silicon characterization, production test bring-up, and yield analysis.Work on digital and mixed-signal SoC testing in ATE environments.Analyze test failures and perform root-cause debugging.Collaborate with design, DFT, validation, and product engineering teams to improve test coverage and product quality.Support new product introduction (NPI) and production ramp activities.Improve test efficiency, yield, and overall manufacturing performance.Prepare technical documentation, debug reports, and test plans.Required Skills5+ years of experience in semiconductor test engineering.Strong hands-on experience with Advantest V93000 SoC test systems.Good understanding of SoC test methodologies and ATE environments.Experience in test program development and debug activities.Knowledge of DFT concepts such as Scan, MBIST, JTAG, and boundary scan.Experience with silicon bring-up and production support.Familiarity with scripting/programming languages such as C, C++, Perl, or Python.Strong debugging, analytical, and problem-solving skills.