Principal Engineer - Analog Design (IP Tech Lead)

Overview In this role, you lead the end-to-end development and integration of mixed-signal IPs for SoCs. You’ll drive IP selection, licensing, and silicon validation while coordinating with cross-functional teams to ensure performance and compatibility. You work on critical analog blocks like high-speed SERDES, PLLs, PVT sensors, and IOs, shaping IP delivery for complex designs. Your work directly supports Microchip’s strategic integration of analog/mixed-signal capabilities across product platforms. This opportunity offers impact in a collaborative, growth-focused environment with leadership development and a strong technology mission. Compensation / Benefitshealth benefits begin day oneretirement savings plansrestricted stock unitsquarterly bonus paymentsESPP program with 2 year look-backcompetitive base pay ResponsibilitiesDefine and review mixed-signal IP interface specs, integration guidelines, and verification plansLead evaluation, selection, and licensing of IPs for SoC projectsCollaborate with silicon IP vendors to customize IP solutions and finalize SOWArchitect and drive integration of mixed-signal IPs into SoC designs for optimal performanceReview and sign off system-level clocking to meet electrical complianceCoordinate with design, verification, physical design, and test teams to resolve integration issuesMaintain up-to-date knowledge of industry trends and best practices in mixed-signal IPOversee silicon validation, characterization, and debug of IPs post-fabrication Key requirementsBachelor’s degree in electrical engineering with strong analog/mixed-signal background and at least 10 years of experience in analog/mixed-signal IP design/integration/validation for SoC, or Master’s with at least 7.5 yearsStrong understanding of SoC architecture, digital-analog interfaces, and system-level integration challengesProven expertise in PLLs, high-speed SERDES, PVT sensors, IOs, and other analog blocksFamiliarity with industry-standard EDA tools for design, simulation, and verificationExperience with PCIe, SAS, SATA and Ethernet; Chiplet experience is a plusUnderstanding of device physics and ESD/Latch-up conceptsStrong written and oral communication skills; leadership and problem-solving abilitiesAbility to work in a team and ramp on new projectscommunicationleadershipproblem-solvingPLLshigh-speed SERDESPVT sensors