Senior Design Verification Engineer

Seeking a Senior Design Verification Engineer to support mixed-signal IC development, including behavioral modeling, full-chip, and digital verification.Responsibilities involve creating self-checking test benches, applying verification methodologies with SystemVerilog and UVM, scripting with Perl/Python, and collaborating with design teams to debug and validate designs.Candidates need a Master's (with 2+ years) or Bachelor's (with 4+ years) in relevant technical fields, with expertise in scripting, verification tools (Cadence Xcelium, Synopsys VCS), and understanding of analog/digital circuits.Partial telecommuting is available. The role offers competitive salary, benefits, and opportunities for professional growth.Apply online with reference number R262669. Candidates must meet export licensing requirements and are encouraged to apply through the employee referral program.