Sr Performance Validation Engineer

Overview As a Senior Pre-Silicon Performance Validation Engineer, you validate silicon performance during pre-silicon phases to ensure designs meet performance, power, and functionality targets before tape-out. You’ll work with RTL simulations, emulation, and virtual platforms to predict behavior across multiple process nodes. You collaborate with architecture, RTL, and verification teams to drive optimizations and establish robust validation methodologies. This role offers the chance to influence high-profile SoCs powering Echo devices and shape pre-silicon workflows at Lab126. Compensation / Benefitshealth insurance (medical, dental, vision)RSUs and sign-on payments401(k) matchingpaid time offparenteral leaveadoption and surrogacy reimbursement ResponsibilitiesDesign and execute validation strategies for silicon performance in pre-silicon using RTL simulations, emulation, and virtual prototypesDevelop test plans that verify performance against specifications before tape-outCreate and maintain validation infrastructure including test benches, performance models, and automated validation frameworksDevelop performance models predicting frequency, power, and thermal characteristicsCreate methodologies for accurate performance prediction and correlation with post-silicon resultsIdentify performance bottlenecks via simulation and analysis and work with design teams on optimization before tape-outPerform debugging and root cause analysisEstablish validation best practices and checklists across the organizationCollaborate with architecture, RTL design, verification, and emulation teams to ensure requirements are metProvide early feedback on performance optimization opportunitiesPartner with external vendors on emulation and virtual platform activities Key requirements7+ years of UVM, C, SystemC, and scripting experienceDeep understanding of digital design, timing analysis, and power management for pre-silicon validation of complex SoCs/processorsBachelor’s degree in electrical engineering, computer engineering, or related field with 7+ years of experienceProficiency with RTL simulators (VCS, Questa, Xcelium) and emulation platforms (Palladium, Zebu)Strong programming skills in Python, C/C++, SystemVerilog or similar for test automation and modelingSolid knowledge of semiconductor design flows from architecture to tape-out and their impact on performancecross-functional collaborationproblem solvingstrong communicationRTL simulations (VCS, Questa, Xcelium)emulation platforms (Palladium, Zebu)performance modeling and prediction