Power Analysis and Optimization Engineer
Job Description
Life at Intel
Diversity at Intel
Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below!
This role is within the E-Core Power team in DEG and as a Power Analysis and Optimization Engineer your responsibilities will include but not limited to:
Working cross-functionally with design, and architecture teams to define targets and convergence methodology.
Identifying opportunities for power optimization in existing design, and new power saving features,
Defining power optimization solutions, and driving optimizations that advance the state of art in power and efficiency.
Designing, developing, and executing power plans for the CPU.
Conducting feature and workload analysis from power standpoint and driving to close any gaps between observed behavior and targets on CPUs in development.
Providing recommendations for future architectures.
Developing and enhancing innovative flows for power analysis.
Ensuring CPUs are optimized for power.
Qualifications
Qualifications
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
The candidate must have a bachelor's degree in electrical/computer engineering, and/or computer science with 6+ years of experience. Master's degree in electrical/computer engineering and/or computer science with 4+ years of experience; OR a PhD in electrical/computer engineering and/or computer science with 2+ years of experience.
3+ years of experience in power optimization and analysis
Dynamic and leakage power estimation and reduction at architecture/RTL/block synthesis and circuit design level.
Preferred Qualifications:
Master's degree in electrical/computer engineering and/or computer science with 3+ years of experience; OR a PhD in electrical/computer engineering and/or computer science with 2+ years of experience in the following:
Proficiency with industry-standard power estimation tools.
Automation skills in a scripting language.
Broad understanding of the overall CPU architecture.
Good chip/CPU level understanding required on power consumption, power estimation and low power design methods.
Inside this Business Group
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.
Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
JobType
Hybrid