Process & Defect Engineer

Role SummaryThe Senior Staff / Principal Process & Defect Engineer is responsible for driving defect reduction, process development, and cross-functional project execution across wafer fabrication operations. This role owns defect strategy, excursion response, and process improvement initiatives, while partnering with integration, equipment, and operations teams to improve yield, stability, and manufacturability.Defect Engineering & Yield OwnershipOwn defect performance across assigned process areas (FEOL/BEOL integration loops)Lead defect excursion response, lot disposition (MRB / ICAR support), and root cause analysisDrive defect reduction strategy using Pareto, correlation, and signature mappingDefine monitoring strategies (KLA / inspection layers) and OCAP triggersProcess Development & OptimizationDesign and execute DOE experiments and split lot analysisOptimize inspection strategies, recipes, and tool conditionsDevelop Best Known Methods (BKM)Support new process introduction and evaluate defect risksCross-Functional Project LeadershipLead multi-discipline yield and defect reduction projectsCoordinate across process, equipment, operations, and defect teamsDrive project execution, timelines, and technical deliverablesPresent findings and recommendations to leadershipDefect Metrology & Tool StrategyOwn defect inspection tools (KLA, SEM) Develop inspection recipes and sensitivity optimizationEnsure tool matching and data consistencyTranslate defect signatures into process actionsManufacturing Support & Continuous ImprovementSupport fab operations and escalation responseImprove communication and passdown structureStandardize defect workflows and documentationIdentify improvements for cycle time and efficiencyQualificationsRequired:Bachelor’s or higher in:Electrical Engineering, Materials Science, Chemical Engineering, Physics, or related field8+ years (Senior) or 12+ years (Principal) in:Semiconductor manufacturingDefect engineering, yield, or process integrationStrong background in:Defect inspection (KLA, SEM review)Data analysis (JMP, Python, SQL, or equivalent)DOE and statistical analysisPreferredExperience with:Cross-functional fab leadershipProject/program managementnew product development (NPD) learning cyclesKnowledge of:SPC systemsYield modeling and defect classification systems*Please note that this position may require U.S. Citizenship or Permanent Residency status in the future depending on federal requirements*What We OfferSalary: The estimated base salary range for the position is $111,000-$154,000. The pay offered is based on many factors including, but not limited to, relevant education, job-related experience, skills and level of the position.Benefits & Other Eligible Compensation: Includes health, dental, vision, disability and life insurance, 401(k) plan with company match, paid time off, annual bonus, and tuition reimbursement.Polar Semiconductor is an Equal Opportunity Employer and prohibits discrimination and harassment of any kind. We are committed to the principle of equal employment opportunity for all employees and to providing employees with a work environment free of discrimination and harassment. All employment decisions are based on business needs, job requirements, and individual qualifications, without regard to race, color, religion, sex, sexual orientation, gender identity, age, national origin, disability, veteran status, or any other status protected by the laws or regulations in the locations where we operate.About Minneapolis/St. Paul AreaOur offices and manufacturing facility are located in Bloomington, Minnesota, a suburb of Minneapolis. Living in the Minneapolis / Saint Paul area offers a strong sense of community, a vibrant arts and music scene, and abundant outdoor activities year-round. The city boasts a lower cost of living than many major metros, excellent parks and lakes, and a well-educated workforce with diverse job opportunities. Its distinct seasons bring variety, from colorful autumns to lively summers filled with festivals and waterfront activities.