Pixel IP Design Engineer for SoC Performance

Apple is seeking an ASIC Design Engineer for the Pixel IP design team. You will be responsible for complex subsystem integration and implementation, writing RTL with assertions, and optimizing for high performance and low power. You will collaborate with architecture, design, and verification teams to ensure robust functionality and timely delivery. A strong background in IP/SoC design and mult-domain clocking is required. #J-18808-Ljbffr