Engineering - Verification Engineer 4

Overview In this role you will contribute to functional verification for complex ASICs and IP blocks within CPU/GPU development efforts. You will work with a team of design and verification engineers to validate functionality across blocks, chips, and systems. You will design and execute test plans with directed and constrained-random tests, adapting to evolving verification methodologies. You will operate within existing verification infrastructure on active projects and apply hardware modeling or assertion-based approaches to verify growing SoC complexity. This position offers impact through rigorous verification in a fast-paced, market-driven environment. ResponsibilitiesDevelop and execute test plans using directed and constrained-random testsVerifying functionality of ASIC/SoC blocks within CPU/GPU project scopeCollaborate with design/verification engineers to understand and verify design elementsDocument verification activity and maintain test infrastructure for active projectsApply UVM-based verification methodologies and assertion-based methods as appropriate Key requirementsMinimum 5 years of proven verification experience on large ASIC projects or hardware-oriented software/firmware experienceStrong C/C++ development in LinuxStrong debugging skills with Gdb and ValgrindProficiency in Object Oriented programming, STL, data structuresKnowledge of Perl and MakefilesExperience with Verilog/SystemVerilog/SystemC (preferred)Experience in C/Verilog with DPI/PLI (preferred)Excellent written and communication skills5+ years experience with UVM test benchstrong analytical skillsattention to detailteam collaborationC/C++ in LinuxGdbValgrind