Embedded Systems Engineer, High Speed DSP

Overview In this role, you will define the long-term firmware roadmap and hardware-software partitioning for Google’s physical-layer interfaces and TPUs. You will architect in-situ monitoring and firmware-driven diagnostics to track link health and BER across millions of ports. You’ll develop bare-metal or RTOS firmware to control high-speed transceivers, and ensure seamless integration with global cluster management. You will work with TPU Systems, Networking Software, and HPC teams to de-risk interface bottlenecks and advance AI silicon. This role sits at the intersection of DSP, co-design, and real-time systems, shaping the future of TPU-based AI acceleration. ResponsibilitiesDefine long-term firmware roadmap and hardware-software partitioning for physical-layer interfacesArchitect in-situ monitoring systems and telemetry for link health and BER trendsDevelop bare-metal/RTOS firmware for high-speed transceivers with real-time control loopsCollaborate with TPU Systems, Networking Software, and HPC teams for silicon firmware integrationIdentify and de-risk hardware-software interface bottlenecks (register maps, boot sequencing, latency) Key requirementsBachelor’s degree in Electrical Engineering, Computer Engineering, or related field10 years of experience in embedded systems/firmware, communication systems, or DSPExperience developing embedded C/C++ for high-speed physical-layer interfaces or transceiverscross-functional collaborationproblem-solvingability to translate complex hardware issues into actionable software solutionsFEC algorithms and advanced modulation schemesfirmware framework specifications and register mapsSilicon Life-cycle telemetry for high-volume networking or AI silicon