Senior DFT Engineer

Job SummaryWe are seeking an experienced Senior DFT / ATPG Engineer to support NVIDIA’s high‑performance GPU and SoC designs. The role focuses on delivering robust Design for Testability (DFT) solutions, comprehensive ATPG, and advanced test features such as MBIST, IO Test, and Clock Verification, ensuring high coverage, yield, and silicon reliability. The engineer will work closely with NVIDIA’s cross‑functional teams to enable first‑time‑right silicon and high‑quality products. Key ResponsibilitiesArchitect, implement, and validate DFT solutions to improve controllability and observability in complex GPU/SoC designsLead scan-based DFT implementation, including scan insertion, compression, and test logic integrationDevelop and debug ATPG patterns targeting stuck‑at, transition, and additional fault modelsImplement and support MBIST architectures for on‑chip memory test, diagnosis, and coverage improvementPerform IO Test planning and validation to ensure reliable interface and pin‑level testingSupport clock DFT and clock verification, including clock controllability, observability, and at‑speed test enablementAnalyze fault coverage reports and drive improvements while balancing power, performance, and area constraintsCollaborate closely with RTL, physical design, verification, and product engineering teamsSupport pattern simulation, silicon bring‑up, manufacturing test debug, and yield rampPerform root cause analysis for test escapes and manufacturing failuresDocument DFT methodologies, test strategies, and best practices aligned with NVIDIA quality standards Required Skills & Qualifications4+ years of hands-on experience in DFT and ATPG for SoC or ASIC designsStrong understanding of DFT fundamentals including controllability, observability, and scan-based testingProven expertise in ATPG pattern generation, analysis, and debugExperience with MBIST, including memory test architectures and diagnosticsKnowledge of IO Test methodologies for interface and pin‑level validationSolid understanding of clock DFT and clock verification conceptsStrong grasp of digital design and RTL fundamentalsExperience with industry‑standard DFT/ATPG EDA toolsAbility to work effectively in fast‑paced, high‑performance semiconductor programsStrong analytical, problem‑solving, and communication skills Preferred QualificationsB-Tech , BE or equivalent degree in Electronics domain.Experience with silicon bring-up and production test supportExposure to advanced nodes and complex SoC & GPU architecturesExposure to low‑power and performance‑aware DFT techniquesExperience supporting high‑volume production and yield optimizationKnowledge of low-power and performance-aware DFT techniquesExperience working in high-volume manufacturing environments