Computer Architect

Job SummaryYou will define the foundational execution model for Opticore's photonic computing platform. At this stage, the most consequential decisions are architectural: how computation is expressed, how data moves, and where the hardware-software boundary sits. You will work directly with the chip team to design the ISA, memory hierarchy, and execution model from first principles. Everything the software stack is eventually built on depends on getting these decisions right. This is a rare opportunity to define a new compute architecture from scratch, for a genuinely novel class of hardware.Key ResponsibilitiesDefine the ISA and execution model for Opticore's photonic processorDesign the memory hierarchy, data flow, and compute scheduling modelBuild performance models and simulators to evaluate architectural tradeoffsCo-design with the PIC and EIC teams to ensure hardware-software decisions are made jointly, not in sequenceEstablish the hardware-software interface that future compiler and runtime work will targetIdentify architectural opportunities and constraints unique to photonic computingMinimum RequirementsDeep background in computer architecture: ISA design, microarchitecture, memory systems, execution modelsExperience building and using performance models or architectural simulatorsStrong understanding of how ML/LLM workloads map to hardwareAbility to reason from first principles about non-von-Neumann or novel compute paradigmsComfortable communicating across hardware and software disciplinesEven Better If You HaveExperience designing custom ISAs or novel accelerator architectures (TPU, NPU, or similar)Familiarity with what makes an ISA compiler-friendly, with awareness of the downstream software implicationsPrior work on non-von-Neumann or emerging compute architecturesBackground in quantization, sparsity, or other model-level optimizations with hardware implicationsWe're reviewing applications on a rolling basis and will reach out to shortlisted candidates.Apply Now