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HDL Technical Lead (FPGA)
Boulder, COMarch 28th, 2026
HDL Technical Lead (FPGA)Location: Boulder, COSalary Range: $150,000 – $250,000OverviewA growing RF technology company is seeking an experienced HDL Technical Lead to provide architectural direction and technical leadership across multiple FPGA development programs.This position is designed for a senior engineer who enjoys leading through technical expertise rather than formal people management. The role combines system-level decision making, cross-program coordination, and hands-on engineering, with approximately 50% of time spent in design, tooling, and complex problem solving.You will support multiple concurrent programs, helping teams align on architecture, improve design reuse, and make sound technical tradeoffs while ensuring consistent execution across projects.Key ResponsibilitiesProvide technical leadership for FPGA/HDL development across 3–4 concurrent programsDefine and guide system-level architecture aligned with program requirements and long-term platform strategyIdentify and drive reuse of IP, architecture, and development tools to improve efficiency and consistencyLead design reviews, technical planning, and cross-team coordination to maintain quality and scheduleContribute directly to:Specialized HDL developmentTooling and automationComplex debugging and performance optimizationCollaborate with RF, hardware, and embedded software teams to ensure successful system integrationProvide technical mentorship, design feedback, and best-practice guidance to engineers (no direct reports)Influence verification strategy, simulation approach, documentation standards, and integration readinessEvaluate timing closure, interface design, and architectural tradeoffs across multiple systemsSupport hardware bring-up and integration within Linux-based environmentsRequired QualificationsU.S. Citizenship and ability to obtain a security clearanceBachelor's degree in Electrical Engineering, Computer Engineering, or related fieldProfessional experience developing FPGA designs using Verilog, VHDL, or similarExperience providing technical direction or architecture ownershipStrong understanding of digital system design, timing analysis, and hardware interfacesExperience with high-speed and control interfaces such as:PCIe, SPI, I2CAXI, Aurora, JESDUnderstanding of how digital logic integrates within RF or mixed-signal systemsAbility to work across programs and think at the system levelPreferred ExperienceMaster's degree in a related fieldPython, C/C++, or scripting for automation and testLinux development experience (user space, drivers, Yocto, or PetaLinux)Simulation and verification tools (Vivado, ModelSim, etc.)Hardware exposure including board bring-up, lab debug, or schematic reviewExperience with HDL modeling or generation toolsBackground supporting multiple products or programs simultaneouslyWork Environment & ScheduleFull-time position (40+ hours as required)Standard weekday schedule with flexibility based on program needsApproximately 10% travelProfessional office and lab environment with access to prototyping equipment, machine shop tools, and hardware development resourcesBenefitsFour weeks of PTO annuallyFlexible scheduling and hybrid work optionsTuition reimbursementUp to 6% 401(k) matchMedical, dental, and vision coverage
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