Verification Engineer - Analog/Mixed-Signal

Must be a US Citizen or Green card holder to qualifyWe are seeking an experienced engineer to handle verification and behavioral modeling for complex mixed-signal ICs.Key Responsibilities:Develop verification plans and testbenches using SystemVerilogCreate accurate behavioral models for analog and mixed-signal circuits (ADC, DAC, LDO, charge pumps, etc.)Run simulations, perform equivalence checks, and debug resultsCollaborate closely with design teams to resolve issuesWrite automation scripts (Python/Perl) and support tapeout sign-offRequirements:BS in Electrical Engineering + 5+ years relevant experienceStrong SystemVerilog and mixed-signal verification skillsExperience with SPICE, HDL simulation, and logic equivalence toolsGood scripting/programming skills (Python, Perl, or C)Solid understanding of analog/mixed-signal architecturesExcellent debugging and teamwork skillsAnalog behavioral modeling experience is a plus.If you're strong in mixed-signal verification and modeling, we'd love to talk!