DDR Engineer

Job Title :PCIE EngineerLocation : San Jose,CA Key skills: Zebu, FPGA , PCIe(All generations) , PCIE Serdes, ARMHigly Skilled Engineer to work on validating and debug the the ULTRA low power designs on emulation and post silicon platforms.Develop and execute test plans in C to validate the Features.In depth knowledge of one or more peripheral protocols and specificationsBare metal/Linux driver development, Firmware development experience and excellent C programming skills.Platform/Board level debug experience and understanding (added advantage).Hands on experience of handling lab equipment: oscilloscopes, signal. generators, protocol analysers, and logic analysers.Capture and analyze waveforms on Zebu (or similar emulation platforms) to root‑cause design and integration issues. 2 to 7 years of experienceExperience in testing and validating embedded systems functionality using emulation and Post silicon Platforms.Strong in ARM architectureDeep understanding with PCIE architecture in all generationsFamiliarity with basic test case development and execution for hardware/software integration both on Pre-Silicon and Post Silicon. Experience in debugging and troubleshooting hardware systems in a virtualized environment. Prioir experience working closely with RTL, Firmware and systems teams.Strong understanding of embedded systems, firmware development, and system-on-chip (SoC) architecture. Proficiency in programming languages such as C or Python for testing and automation. Strong communication skills for effective collaboration with cross-functional teams