Memory Subsystem Engineer: Customer Debug & Design Lead

AMD in San Jose seeks a memory systems engineer to drive customer success across DDR/LPDDR memory subsystems and the memory controller portfolio. You will be the technical contact for escalated issues, root-cause failures on real systems, and guide design-in through production support. You will author customer-facing docs, review architectures for next-generation silicon, and contribute to program decisions across IP, firmware, tools, and signal integrity teams, collaborating across time zones.