Engineer Digital 3
Occupations:
Electronics Engineers, Except ComputerEngineers, All OtherValidation EngineersElectrical EngineersComputer Hardware EngineersIndustries:
Travel Arrangement and Reservation ServicesWeb Search Portals, Libraries, Archives, and Other Information ServicesRadio and Television Broadcasting StationsSound Recording IndustriesMedia Streaming Distribution Services, Social Networks, and Other Media Networks and Content ProvidersJob Title : Digital EngineerDuration : 12 Months and Possible ExtensionLocation: San Diego, CATELECOMMUTE: No- Teleworking not available for this positionCLEARANCE TYPE: Active Secret ClearanceWORK SHIFT: 1st Shift (9/80A)Pay Range : $90-$105/hr on W2 without benefitsDescription :We are looking for you to join our team as a Digital Engineer on site in San Diego, CA.Responsibilities:Design, develop, integrate and test VHDL-based digital designs for our end-user customers and businesses, primarily focused on software defined radio VHDL firmware code bases.Work using FPGA programming development tools and environmentsWork with multi-disciplinary teams, such as with Systems Engineering, Digital Engineering, Hardware, and Integration & TestWork in waterfall or Agile software development environmentAnalyze system concept of operation, requirements and design documents to resolve functional, performance or timing issues.Must Have Qualifications for Digital Engineer:BS + 5 years of experience in related STEM field; MS + 3 years of experienceSignificant hands-on current experience in the field of VHDL design.Candidate must have excellent written and communication skills and be able to work independently and within groups.Candidate must have working knowledge of formal engineering development process, VHDL design and verification.8 or more years of professional technical experience.Experience with VHDL design and OSVVM verification for FPGA firmwareExperience with AMD/Xilinx series including Zynq, Kintex, Ultrascale, Versal family of devices.Experience with Communication Protocols (I2C, SPI, UART, PCIe, Ethernet)Experience with Electronic Design Automation (EDA) tools: Vivado, Quartus, QuestaSimKnowledgeable in FPGA physical constraints and achieving timing closure.Generation of Test benches and support of formal VHDL Verification.Experience with board RO system level debug using test equipment such as oscilloscopes and logic analyzers.Experience with translating systems requirements into programmable logic requirements, design documents, and test specifications.Candidate should have hands on experience with DoD communications systems.