Senior Golang Developer
Job Title: Senior Golang DeveloperLocation: Chicago, Illinois (Initially Remote)Employment Type: Full TimeDesign and implement low-latency services in Go for trading infrastructure and market data processing.Build and optimize high-throughput data pipelines for real-time market data ingestion and order routing.Develop lock-free / wait-free data structures and concurrency primitives for performance-critical paths.Engineer systems with deterministic execution, minimizing latency variance and tail latency.Design and maintain distributed coordination systems using consensus protocols (Raft/Paxos) where required.Implement custom networking stacks or optimized RPC frameworks tailored for trading workloads.Work closely with Linux internals:SyscallsCPU pinningNUMA optimizationKernel bypass techniques (e.g., DPDK, Solarflare Onload)Optimize systems using:perf, eBPF, flame graphsHardware counters and profiling toolsDebug production systems under live trading conditions, ensuring stability and performance.Collaborate with quants and traders to align system behavior with strategy requirements.Required Qualifications10+ years of experience in systems engineering or low-latency infrastructure8+ years of production experience with GolangStrong understanding of:Concurrency and synchronizationMemory models and allocation behaviorHigh-performance system designExperience building real-time or low-latency systems (trading, networking, or similar domains)Hands-on expertise with:Lock-free programmingAtomic operationsMultithreaded system designStrong knowledge of:Linux internals and performance tuningNetworking (TCP/UDP, multicast, low-latency pipelines)Experience with profiling and debugging toolsExposure to high-frequency trading systems or market microstructureExperience with:Kernel bypass networking (DPDK, Solarflare)RDMA / high-speed networkingFamiliarity with:Exchange protocols (FIX, binary feeds)Market data normalization pipelinesContributions to systems like:KubernetesetcdExperience optimizing systems for:Cache localityNUMA architectureCPU microarchitecture behavior