Field-Programmable Gate Arrays Engineer

Title: Sr. FPGA Design and Validation EngineerLocation: Santa Clara, CA - Onsite.Duration: 12 Months (Extendable)Job Description:Top Skills:Have worked with the prototyping platforms such as Xilinx reference boards, Synopsys HAPS platforms, etc.Knowledge of FPGA synthesis tools and methodologies, etc.Familiarity with board design and hardware debugging tools (logic analyzers, oscilloscopes, protocol analyzers).Responsibility:Design, develop, and implement complex FPGA architectures using Xilinx devices (UltraScale, UltraScale+, Versal, etc.)Create RTL designs using Verilog/SystemVerilog for high-performance applications.Perform FPGA prototype design, implementation, and bring-up activities.Create comprehensive design documentation, specifications, and technical reports.Perform timing analysis, closure, and optimization using Vivado tools.Conduct board-level bring-up and system integration testing.Debug complex hardware/firmware issues using logic analyzers, oscilloscopes, and other test equipment.Validate FPGA designs against specifications and performance requirements.Preferred Skill Set & Experience:Extensive experience in field of FPGA hardware prototyping.Familiarity with Python/TCL scripting for design automation.Knowledge of FPGA-based system architecture and hardware/software co-design.Fluent in System Verilog and a familiarity with simulation and debug.Familiarity with industry standard high-speed protocols such as USB and PCIE is a plus.Education:BS (or higher) degree in Electrical or Computer Engineering desired.