<Back to Search
ASIC/FPGA Design Engineer (SMES)
Feasterville-Trevose, PAMarch 26th, 2026
Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key ASIC/FPGA design team, responsible for the delivery of FPGA/ASICs for high-speed crypto applications. S/he will architect, implement high speed crypto architectures, on ASICs/Xilinx Zynq/MPSOC class FPGAs, with hands on design/debug with Ethernet, TCP/IP protocols. L3Harris has state-of-the-art EDA flows/methodologies including Synopsys DC/Primetime/Synplify, Xilinx/Intel/Microchip EDA with HLS, Mentor EDA Family suite : Questa, VIPs, UVM framework, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), Questa Lint, and Catapult (HLS). This is a key, high impact role in the organization to ensure robust quality and delivery of communication products for National Security. Essential Functions: Responsible for deriving engineering specifications from system requirements and developing detailed architecture Execute design (RTL AND/OR HLS (C++ to RTL)) and RTL quality (RDC, CDC, Formal, Lint) Generate test plans Perform module level verification, synthesis/STA, Lab debug, SW driven validation on Linux based SOC evaluation boards Silicon/FPGA bring up, characterization and production ramp/support/collateral Qualifications: BSEE, MSEE Preferred. 5 year's equivalent experience developing, implementing, and verification of high-performance communications/networking ASIC/FPGA products. Experience mapping algorithms and standards (Ethernet, TCP/IP, AXI) to hardware and architecture/system design tradeoffs. Proficient with CDC, RDC. Formal EDA. Proficient in VHDL. Proficient with Synthesis/PAR: SDC, Synopsys Synplify, Vivado Strong logic/board debug, and analytical skills. Experience with project leadership and EVM Excellent written, verbal, and presentation skills. Active SECRET Clearance Preferred Additional Skills: A big plus if the candidate possesses "any" of the following: Proficiency in C++ (OOP) Proficiency with Xilinx MPSOC design with writing/debugging with SDKs, BSPs on bare metal/PetaLinux OS. Knowledge of PCIe, NVMe, USB protocols. Experience with High level synthesis (Xilinx Vivado HLS, AND/OR Mentor Calypto ). In compliance with pay transparency requirements, the salary range for this role is $111,515 - $151,500. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. L3Harris also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements. L3Harris Technologies is proud to be an Equal Opportunity Employer. L3Harris is committed to treating all employees and applicants for employment with respect and dignity and maintaining a workplace that is free from unlawful discrimination. All applicants will be considered for employment without regard to race, color, religion, age, national origin, ancestry, ethnicity, gender (including pregnancy, childbirth, breastfeeding or other related medical conditions), gender identity, gender expression, sexual orientation, marital status, veteran status, disability, genetic information, citizenship status, characteristic or membership in any other group protected by federal, state or local laws. L3Harris maintains a drug-free workplace and performs pre-employment substance abuse testing and background checks, where permitted by law. Please be aware many of our positions require the ability to obtain a security clearance. Security clearances may only be granted to U.S. citizens. In addition, applicants who accept a conditional offer of employment may be subject to government security investigation(s) and must meet eligibility requirements for access to classified information. By submitting your resume for this position, you understand and agree that L3Harris Technologies may share your resume, as well as any other related personal information or documentation you provide, with its subsidiaries and affiliated companies for the purpose of considering you for other available positions. L3Harris Technologies is an E-Verify Employer. Please click here for the E-Verify Poster in English or Spanish . For information regarding your Right To Work, please click here for English or Spanish .
Showing 450 of 4,960 matching similar jobs in Springbrook, ND
- Head of Hardware Product - Family OS & Consumer Electronics
- HW/SW Test Engineer
- Integration & Test Engineer
- SharePoint Designer
- Electrical Test Engineer
- Embedded Software Engineer
- Reliability Engineer – MB2023
- CAD / PCB Engineer II
- Power Design Electrical Engineer II
- Electrical Engineer II - Test
- Hardware Engineering Technical Leader
- Sr. Electrical Test Engineer
- Project Manager, Texas Institute for Electronics
- ASIC Design Verification Engineering Technical Leader
- ASIC Design Verification Emulation Engineer
- ECU Test Engineer
- Electrical Engineer II- Systems Engineering
- Hardware Co-op
- Electrical Engineer II - Systems
- Optical Hardware Engineering Technical Leader, Acacia (Hybrid)
- Robotics Hardware System Architect
- Systems Integration Engineer
- Validation/Verification Engineer - Computer Science Focus (Exton, PA) - 13924
- Electrical Design Engineer
- Dermatology Physician
- Operations Manager for EE Firm - Relocation available
- Staff Power Applications Engineer
- Senior Product Applications Engineering
- Ride Control Hardware Engineer, Principal (Controls Automation)
- Staff Electrical Engineer
- Electrical engineering / automation
- Bilingual SOLIDWORKS Application Engineer
- Electrical Senior Design Engineer
- Architecture / design / development - architect
- Founding Firmware Engineer - AI Hardware, Equity & Impact
- Remote Android OS Embedded Engineer (AOSP, Real-Time)
- Remote Web Designer & Developer — UX-Driven
- Senior IC Packaging Layout Engineer — Remote | Power Integrity & SIRemoteMarch 26th, 2026
- Senior Embedded C++ Engineer (Remote) - Medical Imaging
- Technischer Account-Manager Power Electronics (Remote)RemoteMarch 26th, 2026