R&D Engineer Hardware 4

Job Description Design and develop verification and evaluation boards to test semiconductor IC products. Evaluate design goals and implement into hardware; design conception, package pin‑out feasibility studies, part selection, manufacturer and PCB material selection, PCB stack‑up, and schematic capture. Will have responsibility to design the PCB layout or oversee layout designers, simulation, board fabrication and assembly. Responsibilities Part identification and interconnects Signal integrity Mechanical knowledge for typical board outline requirements Mechanical stability and general brackets or fixtures Coordinate designs between analog chip designers, digital chip designers, package engineers, device verification test (DVT) engineers and product line managers Candidate must be an excellent communicator, both written and verbally. Able to host design reviews and attend various meetings that define design goals. Able to create design documentation, basic board operation summaries, bring up and debug, respond to questions about board use, and understand board limitations. Desired Experience and Capabilities High speed signal trace design Mentor DxDesigner, Cadence Allegro use Signal integrity using 3D tools such as HFSS FPGA Verilog coding a plus Must be able to work independently Self‑starter Experience: MSEE or equivalent degree. 6+ years of related experience Compensation And Benefits The annual base salary range for this position is $108,000 - $172,800. This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements. Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence. #J-18808-Ljbffr