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Application Specific Integrated Circuit Design Engineer
San Jose, CAMarch 20th, 2026
Title: ASIC/RTL Design Engineer - Senior (US)Location: San Jose, CA - OnsiteDuration: 12 Months (Possible to extension)Type: On W2 Contract (???? ?????? / ????????).Job Description:Top Must Have Skills:Experience in Designing RTL block for an SOC. Must have proven track record of ASIC design on several production tape-outs. Experience with Lint, CDC, RDC.Key Responsibilities: • Write micro-architecture documentation and own major portions of the design and implementation of blocks to meet functional, timing, area, and power requirements. • Collaborate with architecture and hardware teams to understand the requirements. • Work with verification and physical design teams to achieve high quality design and successful tape out. • Design and implement logic functions that enable efficient test and debug. • Participate in silicon bring-up for features owned.Required: • 5-6+ years' experience required • Must have proven track record of ASIC design on several production tape-outs. • Experience in Designing RTL block for an SOC. • Experience in integrating ASIC IP into an SOC. • Experience with synthesis, static timing analysis & optimizations.Nice-to-have: • Experience writing timing constraints and exceptions. • Experience with automation using scripting techniques such as PERL, Python or Tcl • Experience in Power-saving techniques. • Experience with Arm architecture and APB, AXI, CHI protocols. • Experience with design involving Interconnects.Education: Bachelor's degree required
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