Lead FPGA Design Engineer

Overview As a FPGA/SoC engineer at MITRE, you will design and deliver advanced embedded systems for sensing, communications, and navigation that support national security missions. You will work with a collaborative, multidisciplinary team to prototype, test, and optimize hardware and algorithms on state-of-the-art devices. The role blends hands-on hardware development with leadership, sponsor interaction, and technology evaluation to shape next-generation prototypes. This is a mission-driven opportunity to impact critical government programs through innovative, high-performance electronics. ResponsibilitiesArchitect and develop FPGA and SoC solutions using state-of-the-art devicesLead design, integration, bring-up, and testing of custom hardware prototypesDrive development lifecycle from requirements to concept demonstrationImplement and optimize algorithms in hardware and software on embedded platformsLead project teams and mentor junior engineersInterface with sponsors and build relationships for future programsEvaluate and incorporate emerging technologies into next-generation prototype systems Key requirements8 years of related experience with a Bachelor’s degree or 6 years with a Master’s degree in electrical engineering, computer engineering, or a related fieldExperience with RTL languages (VHDL, Verilog, SystemVerilog)Experience leading RTL design, simulation, synthesis, timing closure, and verificationExperience using EDA tool suites (Cadence, Synopsys, Siemens, AMD/Xilinx, Intel/Altera)Experience designing and deploying advanced FPGA and SoC devicesExperience developing and integrating complex embedded hardware systemsStrong design, verification, test, and deployment practicesExperience integrating third-party IP and verification IPScripting and automation skills (Python, TCL, CMake)Experience leading technical efforts and small engineering teamsExcellent written and verbal communication skillsEligibility to obtain and maintain a Top Secret U.S. Government security clearanceMinimum on-site work requirement of 4 days per weekstrong communicationleadershipmentoringRTL languages (VHDL, Verilog, SystemVerilog)FPGA and SoC designHDL design, simulation, synthesis, timing closure, verification