Lead Validation Engineer - Data Center GPU

Overview In this Lead Domain Validation Engineer role, you will own the validation strategy for domain and power-management aspects of AMD Data Center GPU products through pre-silicon to system-level debug. You will collaborate with architecture, design, firmware, diagnostics, and platform teams to deliver high-quality AI and HPC products. You will drive validation plans, issue triage, root-cause analysis, and closure, shaping how complex systems validate hardware and software together. This role offers the chance to influence critical validation coverage, mentor engineers, and contribute to scalable, high-performance ROCM-driven platforms in a collaborative, cross-functional environment. ResponsibilitiesOwn SMU hardware validation planning and execution across emulation, ASIC bring-up, post-silicon enablement, regression, and sustaining phases.Develop validation plans for SMU sub-blocks and power-management features (bootcode, clocking, fuse, SMN, SMUIO, thermal, RSMU, security interactions, system-management functions).Lead debug triage, root-cause analysis, and issue closure across hardware, firmware, platform, diagnostics, and system-level interactions.Collaborate with architecture, design, firmware, diagnostics, platform, automation, customer engineering, and program teams to align scope, risks, dependencies, and exit criteria.Build and improve automation, validation content, debug-analysis scripts, and regression checks to enhance coverage, efficiency, and repeatability.Review RTL, specifications, firmware interfaces, register maps, and validation collateral to identify coverage gaps and improve validation effectiveness.Support lab-based and system-level debugging using platform tools, firmware logs, register-level analysis, and standard measurement equipment.Support customer and sustaining issues by providing SMU technical expertise, debug guidance, and issue-resolution support.Mentor engineers and help improve team validation methodology, debug practices, and product quality. Key requirementsStrong experience in semiconductor validation, silicon bring-up, SoC validation, firmware validation, or hardware/software integration.Hands-on experience with power-management validation, SMU/PMFW functionality, SoC control fabrics, clocking, reset, fuse, thermal, voltage-regulator, or platform-management features.Experience developing validation plans, test content, automation, and debug methodologies for complex SoC or GPU products.Strong debugging skills across hardware, firmware, software, diagnostics, and platform interactions.Experience with emulation, simulation, or FPGA/prototyping environments.Proficiency in Python and C/C++ for automation, test infrastructure, or debug-analysis tools.Familiarity with Linux, lab bring-up, register-level debug, firmware logs, and platform debug tools.Ability to execute independently, manage priorities, influence cross-functional teams, and drive technical issues to closure.cross-functional collaborationmentoring and leadershipclear technical communicationSoC domain validationhardware-software integrationpower-management validation