Validation Engineer

Job Title: RTL Verification EngineerLocation: Santa Clara, CA --Bay Area, CAOnsite/ Remote: Day 1 Onsite at customer locationJD:System Verilog, UVMGood knowledge in AMBA,AX4,AHBIP/SS/SOC verification experienceTest Env, test case developmentRegression debug, coverage analysisGood knowledge in One of the High speed IF protocol like PCIe6, DDR5, Ethernet or USB3Experience in Synopsys/Cadance Tools usage