R&D Engineer

Overview In this role you will contribute to design, simulation, prototyping and testing of wireless and sensing projects as part of the R&D Engineering team. You will build and improve HDL test benches and testing infrastructure, and automate validation to ensure robust hardware. You will work on FPGA design and verification, collaborating with cross-functional teams to address complex signal-processing challenges. This hybrid role combines hands-on engineering with scalable testing workflows, offering impact on product quality and performance. You will help shape future wireless sensing solutions through rigorous verification and tooling improvements. ResponsibilitiesArchitect testbenches for full-system HDL simulationsMaintain and improve HDL testing infrastructureAutomate testing using scriptsCollect, maintain, and use code coverage data from test suitesDesign and code HDL blocksHardware verification and troubleshooting; familiarity with logic analyzers Key requirementsBachelor of Science in Electrical Engineering, Computer Science, or relevant field plus 4 years of FPGA design and testing/verification OR 2 years with MSProven experience with multiple clock-domain, high-utilization FPGA designsExperience with Xilinx FPGAs, SoCs, and the Vivado IDEExperience with TCL or PythonFPGA design and testing/verificationHDL designXilinx FPGAs and SoCsVivado IDETCLPython