Electrical Electronics Validation Enginee
Role: Hardware Engineer Location: Sunnyvale, CA Job Description: We are seeking an experienced EE Validation Engineer to support hardware validation of next-generation smart glasses, working closely with the validation lead. In this role, your primary focus will be monitoring validation progress, reviewing CM test reports, analyzing failures, and coordinating with EE design partners to drive issues to closure. You will also guide CM engineers on measurement procedures and perform hands-on PI/SI debug when needed. While you must possess strong hands-on measurement skills, the majority of your time will be spent interpreting data, tracking issues, and ensuring problems are resolved efficiently. You will not own final validation decisions, but you are expected to be technically strong enough to flag risks, recommend actions, and keep execution on track under the lead's direction.Technical Knowledge Required:Power Integrity (PI)DC-DC converter characterization: line/load regulation, efficiency, transient response, output ripple/noisePower sequencing validation and timing verification against IC specificationsPower rail stability under varying load conditions; current profilingBattery charging circuit validation: charge profiles, protection, thermal limitsPDN concepts: ground bounce, decoupling strategy, voltage droop analysis.Signal Integrity (SI)High-speed interface measurement: MIPI CSI, SPI, I2C, I2S/PDM, USB, UARTSignal quality assessment: rise/fall times, overshoot/undershoot, ringing, eye diagramsCrosstalk, reflections, and impedance discontinuities on flex/rigid-flex assembliesClock signal quality and jitter characterizationProtocol-level correlation with physical-layer signal issuesSchematic & Layout CompetencyRead and interpret multi-page schematics to understand circuit topology, power trees, and signal routingReview PCB layout (rigid and flex) to identify optimal probe locations and debug access pointsAssess layout for SI/PI risk: trace routing, return path continuity, impedance control, via transitionsProvide layout feedback to design team for improved testability.Required Qualifications:BS/MS in Electrical Engineering4+ years of EE hardware validation experience with strong emphasis on power integrity and signal integrityProven ability to analyze test data, identify root causes, and drive issues to closure with cross-functional teamsExperience reviewing test reports for correctness, identifying gaps, and driving follow-up actionsAbility to develop test procedures that others execute — clear technical writing, structured SOPs, annotated diagramsStrong schematic reading skills — trace signal paths, understand power distribution, map circuit function from schematics and datasheetsPCB layout review experience — assess probe access, SI/PI risk, debug strategyExpert-level knowledge of lab instruments: high-bandwidth oscilloscopes, power rail probes, active/differential probes, current probes, spectrum analyzersExperience with DC-DC converter characterization and high-speed digital signal measurementsSolid understanding of transmission line theory, impedance matching, and flex PCB signal integrity challengesStrong communication skills — ability to explain complex EE issues clearly to CM teams and design partners.Preferred Qualifications:Experience working with CMs or ODMs in a validation support capacityExperience with wearable, mobile, or IoT hardware (space-constrained, low-power designs)Familiarity with RF measurement (BLE/WiFi TX power, sensitivity, antenna return loss)Familiarity with proto/EVT/DVT/PVT build cycles and NPI environmentsExperience with issue tracking systems and cross-functional coordination in hardware programs.Must Have: 4+ years of EE hardware validation experience with strong emphasis on power integrity and signal integrity Ability to develop test procedures that others execute — clear technical writing, structured SOPs, annotated diagrams. Strong schematic reading skills — trace signal paths, understand power distribution, map circuit function from schematics and datasheets PCB layout review experience — assess probe access, SI/PI risk, debug strategy. Expert-level knowledge of lab instruments: high-bandwidth oscilloscopes, power rail probes, active/differential probes, current probes, spectrum analyzers.Nice to have: Experience with wearable, mobile, or IoT hardware (space-constrained, low-power designs).Familiarity with proto/EVT/DVT/PVT build cycles and NPI environments.Experience with issue tracking systems and cross-functional coordination in hardware programs