Verification Engineer

Verification EngineerLocation: Chicago, IL - OnsiteDuration: 6 to 8 monthsMust have very good System Verilog/UVM experience in developing test benchesMust have experience with developing test benches with RISC-V based SoCRISC-V processor verification is an added advantageShould have expertise developing scoreboards, monitors, and checkersShould have expertise in functional and code coverageHave experience in IP/SoC VerificationExpertise in AMBA/AXI bus protocolsMust have USB3.0 verification expertiseScripting Language (PERL/Python/Shell/Makefile)Must have good debugging and problem-solving skillsGood to have GLS verification experience