Optical Systems Engineer

About EtchedEtched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.Job SummaryEtched is looking for an exceptional Optical Systems Engineer to join our team. In this role, you will own the definition and implementation of the optical interconnect architecture for our next-generation accelerator systems and help us scale our manufacturing capabilities.Key ResponsibilitiesLead optical link architecture and system design for Etched's accelerator systemsEvaluate and integrate next-generation interconnect technologies (such as NPO, CPO, and OCI) into our product roadmapDrive prototypes through definition, validation, and the transition to volume productionPartner with Signal Integrity, PCB, ASIC, Thermal, and Mechanical Engineering teams to implement electrical-optical interfaces in high-performance AI serversEngage optical module, laser, and PIC suppliers on specifications, qualification, and integrationCapture multi-rack interconnect requirements including topology, reach, connectors, and fiber management to ensure our products meet themBring up optical interfaces on the accelerator card and debug link issues using BERTs, sampling scopes, and OSAsDefine optical bring-up strategies and equipment while supporting test development for high-volume manufacturingOwn optics-related documentation, including AVLs, fiber/cable BOMs, serviceability guidelines, and assembly proceduresYou may be a good fit if you have (Must-have qualifications)5–10 years of experience in optical interconnect, transceiver, or photonic system design and development for high-density compute systemsExpertise across advanced optical interconnect architectures, including Co-Packaged Optics (CPO), Near-Packaged Optics (NPO), Optical Compute Interconnect (OCI), Linear Pluggable Optics (LPO), and emerging form factors (XPO)Clear understanding of architectural tradeoffs across these technologies: energy-per-bit, bandwidth density, reach, latency, serviceability, and reliabilityStrong fundamentals in optical link engineering, including link-budget analysis, IL/RL, OSNR, eye diagrams, jitter, BER, and FEC marginingWorking knowledge of laser sources, modulators, TIAs, and DSPs/retimersKnowledge of high-speed host interfaces such as 100G/200G-per-lane PAM4Experience with traditional pluggable solutions (OSFP, QSFP-DD)Deep familiarity with photonic-electronic co-design and advanced packaging methods, such as fiber-attach (edge couplers, grating couplers, V-groove FAUs, detachable optical connectors), optical interposers, and 2.5D/3D heterogeneous integrationComfort co-designing optical engines alongside the ASIC, substrate, package, and cold-plate-integrated liquid cooling solutionsConversant in relevant industry standards and MSAs (OCI, Open CPX, OIF, UCIe)Proven track record of bringing up optical links and PIC-based subsystems alongside silicon, including root-cause debugging with PIC foundries, ELS vendors, and OSATsDeep understanding of datacenter infrastructure, specifically high-power (>10 kW) liquid-cooled AI servers and cluster-scale optical fabricsPassionate about modern AIs like ChatGPT, and willing to learn about them on the jobBenefitsMedical, dental, and vision packages with generous premium coverage$500 per month credit for waiving medical benefitsHousing subsidy of $2k per month for those living within walking distance of the officeRelocation support for those moving to San Jose (Santana Row)Various wellness benefits covering fitness, mental health, and moreDaily lunch and dinner in our officeHow We’re DifferentEtched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.