DPU Reliability & Debug Architect

Meta's Infrastructure Silicon group is seeking a Data Processing Unit (DPU) RAS and Debug Architect in Sunnyvale, CA. You will define reliability, availability, and serviceability for DPUs, set FIT-rate targets, and shape trace, debug, and telemetry across hardware, firmware, and software. Collaboration with firmware, driver, and RTL teams is essential. Required: 8+ years architecting RAS and debug for NIC/DPU or similar ASICs, strong knowledge of error protection and memory RAS, and experience #J-18808-Ljbffr