FPGA Design / Verification Engineer

Company Description TAD PGS, Inc., also known as Adecco Government, has been a trusted provider of human resources solutions for the government sector for over 50 years. Supported by an experienced executive team with expertise in federal regulations and security clearance processes, we are a leading human capital provider for government agencies and their partners. As a wholly owned subsidiary of the Adecco Group, the world’s largest human-capital solutions organization and a Fortune Global 500 company, we benefit from a global network of more than 6,700 offices across over 70 countries. Role Description This is a full-time, on-site role located in Denver, CO, for an FPGA Design / Verification Engineer. In this position, you will design and architect RTL for FPGAs, perform debugging and functional verification of hardware designs, and execute validation tasks to ensure the integrity of the systems. You will collaborate closely with a cross-functional team to maintain compliance with industry standards, including Good Manufacturing Practice (GMP), and contribute to high-quality deliverables. Qualifications Expertise in RTL Design and DebuggingExperience in Functional Verification and Validation processesKnowledge and application of Good Manufacturing Practice (GMP)Strong analytical and problem-solving skills with attention to detailAbility to collaborate effectively with cross-functional teamsBachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related fieldPrior experience with FPGA programming and development toolsFamiliarity with VHDL, Verilog, or SystemVerilog is highly desirable